Commit 5e3bbedd authored by kakatkarakshay's avatar kakatkarakshay
Browse files

avicii: Extract from Nord OOS 11.0.6.6

parents
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
NXP_RF_CONF_BLK_1={
20, 02, F9, 1D,
A0, 0D, 06, 06, 37, 08, 76, 00, 00,
A0, 0D, 03, 24, 03, 7C,
A0, 0D, 06, 02, 35, 00, 3E, 00, 00,
A0, 0D, 06, 04, 35, F4, 05, 70, 02,
A0, 0D, 06, C2, 35, 00, 3E, 00, 03,
A0, 0D, 06, 04, 42, F8, 40, FF, FF,
A0, 0D, 04, 32, 42, F8, 40,
A0, 0D, 04, 46, 42, 68, 40,
A0, 0D, 04, 56, 42, 78, 40,
A0, 0D, 04, 5C, 42, 80, 40,
A0, 0D, 04, CA, 42, 68, 40,
A0, 0D, 06, 06, 16, 0E, 00, 1F, 00,
A0, 0D, 06, 06, 42, 00, 02, F2, F2,
A0, 0D, 06, 32, 4A, 53, 07, 00, 1B,
A0, 0D, 06, 46, 4A, 33, 07, 00, 07,
A0, 0D, 06, 56, 4A, 43, 07, 00, 07,
A0, 0D, 06, 5C, 4A, 11, 07, 01, 07,
A0, 0D, 06, 34, 44, 66, 0A, 00, 00,
A0, 0D, 06, 48, 44, 65, 0A, 00, 00,
A0, 0D, 06, 58, 44, 66, 08, 00, 00,
A0, 0D, 06, 5E, 44, 55, 08, 00, 00,
A0, 0D, 06, CA, 44, 65, 0A, 00, 00,
A0, 0D, 06, 06, 44, 04, 04, C4, 00,
A0, 0D, 06, 34, 2D, DC, 20, 04, 00,
A0, 0D, 06, 48, 2D, 15, 34, 1F, 01,
A0, 0D, 06, 46, 0F, 6C, 01, 04, 00,
A0, 0D, 06, 58, 2D, 0D, 48, 0C, 01,
A0, 0D, 06, 5E, 2D, 0D, 5A, 0C, 01,
A0, 0D, 06, CA, 2D, 15, 34, 1F, 01
}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
NXP_RF_CONF_BLK_2={
20, 02, 19, 03,
A0, 0D, 06, 7A, 16, 8E, 00, 1F, 00,
A0, 0D, 06, 22, 44, 44, 0A, 00, 00,
A0, 0D, 03, 02, 43, A0
}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
NXP_RF_CONF_BLK_3={
20, 02, D6, 01, A0, 34, D2, 23, 04, 18, 07, 00, 00, 20, 60, 01, 10, 20, 60, 01, 1A, 20, A0, 02, 28, 20, A0, 02, 3C, 00, 40, 01, 5C, 00, 40, 01, 93, 00, A0, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 48, 01, 00, 00, 08, 03, 00, 00, 08, 01, 00, 00, C8, 02, 00, 00, C8, 00, 00, 00, 88, 02, 00, 00, 48, 02, 00, 00, B8, 00, 00, 00, 68, 00, 00, 00, 18, 00, 00, 00, 08, 02, 00, 00, 00, 00, 00, 00, 00, 00, 47, 00, 20, 60, 01, 10, 20, 60, 01, 1A, 20, A0, 02, 28, 20, A0, 02, 3C, 00, 40, 01, 5C, 00, 40, 01, 93, 00, A0, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 48, 01, 00, 00, 08, 03, 00, 00, 08, 01, 00, 00, C8, 02, 00, 00, C8, 00, 00, 00, 88, 02, 00, 00, 48, 02, 00, 00, B8, 00, 00, 00, 68, 00, 00, 00, 18, 00, 00, 00, 08, 02, 00, 00, 00, 00
}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
NXP_RF_CONF_BLK_4={
20, 02, 5B, 01, A0, 0B, 57, 11, 11, 90, 78, 0F, 4E, 00, 3D, 95, 00, 00, 3D, 9F, 00, 00, 50, 9F, 00, 00, 59, 9F, 00, 00, 5A, 9F, 00, 00, 64, 9F, 00, 00, 65, 9F, 00, 00, 6E, 9F, 00, 00, 72, 9F, 00, 00, 79, 9F, 00, 00, 7B, 9F, 00, 00, 84, 9F, 00, 00, 86, 9F, 00, 00, 8F, 9F, 00, 00, 91, 9F, 00, 00, 9A, 9F, 00, 00, A1, 9F, 00, 00, A7, 9F, 00, 00, B0, 1F, 00, 00, B9, 1F, 00, 00
}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_5={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_6={
#}
###############################################################################
# Core configuration extensions
# It includes
# Wired mode settings A0ED, A0EE
# Tag Detector A040, A041, A043
# Low Power mode A007
# Clock settings A002, A003
# PbF settings A008
# Clock timeout settings A004
# eSE (SVDD) PWR REQ settings A0F2
# Window size A0D8
# DWP Speed A0D5
# How eSE connected to PN553 A012
# UICC2 bit rate A0D1
# SWP1A interface A0D4
# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
NXP_CORE_CONF_EXTN={
20, 02, 67, 15,
A0, EC, 01, 01,
A0, ED, 01, 00,
A0, 5E, 01, 01,
A0, 12, 01, 02,
A0, 40, 01, 01,
A0, 41, 01, 05,
A0, 43, 01, 04,
A0, 46, 02, BA, 27,
A0, 47, 02, BA, 27,
A0, D8, 01, 02,
A0, DD, 01, 2D,
A0, D1, 01, 02,
A0, D4, 01, 01,
A0, 37, 01, 35,
A0, F2, 01, 01,
A0, 09, 02, E8, 03,
A0, 38, 04, 05, 05, 05, 00,
A0, 3A, 08, C8, 00, C8, 00, C8, 00, C8, 00,
A0, B1, 02, E8, 03,
A0, 9F, 02, 08, 08,
A0, 85, 04, 50, 08, 28, 3C
}
# A0, F2, 01, 01,
# A0, 40, 01, 01,
# A0, 41, 01, 02,
# A0, 43, 01, 04,
# A0, 02, 01, 01,
# A0, 03, 01, 11,
# A0, 07, 01, 03,
# A0, 08, 01, 01
# }
###############################################################################
# Core configuration settings
NXP_CORE_CONF={
20, 02, 2E, 0E,
28, 01, 00,
21, 01, 00,
30, 01, 08,
31, 01, 03,
32, 01, 60,
38, 01, 01,
33, 04, 01, 02, 03, 04,
54, 01, 06,
50, 01, 02,
5B, 01, 00,
80, 01, 01,
81, 01, 01,
82, 01, 0E,
18, 01, 01
}
###############################################################################
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
NXP_RF_CONF_BLK_1={
20, 02, F9, 1D,
A0, 0D, 06, 06, 37, 08, 76, 00, 00,
A0, 0D, 03, 24, 03, 7E,
A0, 0D, 06, 02, 35, 00, 3E, 00, 00,
A0, 0D, 06, 04, 35, F4, 05, 70, 02,
A0, 0D, 06, C2, 35, 00, 3E, 00, 03,
A0, 0D, 06, 04, 42, F8, 40, FF, FF,
A0, 0D, 04, 32, 42, F8, 40,
A0, 0D, 04, 46, 42, 68, 40,
A0, 0D, 04, 56, 42, 78, 40,
A0, 0D, 04, 5C, 42, 80, 40,
A0, 0D, 04, CA, 42, 68, 40,
A0, 0D, 06, 06, 16, 0E, 00, 1F, 00,
A0, 0D, 06, 06, 42, 00, 02, F2, F2,
A0, 0D, 06, 32, 4A, 53, 07, 00, 1B,
A0, 0D, 06, 46, 4A, 33, 07, 00, 07,
A0, 0D, 06, 56, 4A, 43, 07, 00, 07,
A0, 0D, 06, 5C, 4A, 11, 07, 01, 07,
A0, 0D, 06, 34, 44, 66, 0A, 00, 00,
A0, 0D, 06, 48, 44, 65, 0A, 00, 00,
A0, 0D, 06, 58, 44, 66, 08, 00, 00,
A0, 0D, 06, 5E, 44, 55, 08, 00, 00,
A0, 0D, 06, CA, 44, 65, 0A, 00, 00,
A0, 0D, 06, 06, 44, 04, 04, C4, 00,
A0, 0D, 06, 34, 2D, DC, 20, 04, 00,
A0, 0D, 06, 48, 2D, 15, 34, 1F, 01,
A0, 0D, 06, 46, 0F, 6C, 01, 04, 00,
A0, 0D, 06, 58, 2D, 0D, 48, 0C, 01,
A0, 0D, 06, 5E, 2D, 0D, 5A, 0C, 01,
A0, 0D, 06, CA, 2D, 15, 34, 1F, 01
}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
NXP_RF_CONF_BLK_2={
20, 02, 19, 03,
A0, 0D, 06, 7A, 16, 8E, 00, 1F, 00,
A0, 0D, 06, 22, 44, 44, 0A, 00, 00,
A0, 0D, 03, 02, 43, A0
}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
NXP_RF_CONF_BLK_3={
20, 02, D6, 01, A0, 34, D2, 23, 04, 18, 07, 00, 00, 20, 60, 01, 10, 20, 60, 01, 1A, 20, A0, 02, 28, 20, A0, 02, 3C, 00, 40, 01, 5C, 00, 40, 01, 93, 00, A0, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 48, 01, 00, 00, 08, 03, 00, 00, 08, 01, 00, 00, C8, 02, 00, 00, C8, 00, 00, 00, 88, 02, 00, 00, 48, 02, 00, 00, B8, 00, 00, 00, 68, 00, 00, 00, 18, 00, 00, 00, 08, 02, 00, 00, 00, 00, 00, 00, 00, 00, 47, 00, 20, 60, 01, 10, 20, 60, 01, 1A, 20, A0, 02, 28, 20, A0, 02, 3C, 00, 40, 01, 5C, 00, 40, 01, 93, 00, A0, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 48, 01, 00, 00, 08, 03, 00, 00, 08, 01, 00, 00, C8, 02, 00, 00, C8, 00, 00, 00, 88, 02, 00, 00, 48, 02, 00, 00, B8, 00, 00, 00, 68, 00, 00, 00, 18, 00, 00, 00, 08, 02, 00, 00, 00, 00
}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
NXP_RF_CONF_BLK_4={
20, 02, 5B, 01, A0, 0B, 57, 11, 11, 90, 78, 0F, 4E, 00, 3D, 95, 00, 00, 3D, 9F, 00, 00, 50, 9F, 00, 00, 59, 9F, 00, 00, 5A, 9F, 00, 00, 64, 9F, 00, 00, 65, 9F, 00, 00, 6E, 9F, 00, 00, 72, 9F, 00, 00, 79, 9F, 00, 00, 7B, 9F, 00, 00, 84, 9F, 00, 00, 86, 9F, 00, 00, 8F, 9F, 00, 00, 91, 9F, 00, 00, 9A, 9F, 00, 00, A1, 9F, 00, 00, A7, 9F, 00, 00, B0, 1F, 00, 00, B9, 1F, 00, 00
}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_5={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_6={
#}
###############################################################################
# Core configuration extensions
# It includes
# Wired mode settings A0ED, A0EE
# Tag Detector A040, A041, A043
# Low Power mode A007
# Clock settings A002, A003
# PbF settings A008
# Clock timeout settings A004
# eSE (SVDD) PWR REQ settings A0F2
# Window size A0D8
# DWP Speed A0D5
# How eSE connected to PN553 A012
# UICC2 bit rate A0D1
# SWP1A interface A0D4
# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
NXP_CORE_CONF_EXTN={
20, 02, 67, 15,
A0, EC, 01, 01,
A0, ED, 01, 03,
A0, 5E, 01, 01,
A0, 12, 01, 02,
A0, 40, 01, 01,
A0, 41, 01, 05,
A0, 43, 01, 04,
A0, 46, 02, BA, 27,
A0, 47, 02, BA, 27,
A0, D8, 01, 02,
A0, DD, 01, 2D,
A0, D1, 01, 02,
A0, D4, 01, 01,
A0, 37, 01, 35,
A0, F2, 01, 01,
A0, 09, 02, E8, 03,
A0, 38, 04, 05, 05, 05, 00,
A0, 3A, 08, C8, 00, C8, 00, C8, 00, C8, 00,
A0, B1, 02, E8, 03,
A0, 9F, 02, 08, 08,
A0, 85, 04, 50, 08, 28, 3C
}
# A0, F2, 01, 01,
# A0, 40, 01, 01,
# A0, 41, 01, 02,
# A0, 43, 01, 04,
# A0, 02, 01, 01,
# A0, 03, 01, 11,
# A0, 07, 01, 03,
# A0, 08, 01, 01
# }
###############################################################################
# Core configuration settings
NXP_CORE_CONF={
20, 02, 2E, 0E,
28, 01, 00,
21, 01, 00,
30, 01, 08,
31, 01, 03,
32, 01, 60,
38, 01, 01,
33, 04, 01, 02, 03, 04,
54, 01, 06,
50, 01, 02,
5B, 01, 00,
80, 01, 01,
81, 01, 01,
82, 01, 0E,
18, 01, 01
}
###############################################################################
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
NXP_RF_CONF_BLK_1={
20, 02, F9, 1D,
A0, 0D, 06, 06, 37, 08, 76, 00, 00,
A0, 0D, 03, 24, 03, 7E,
A0, 0D, 06, 02, 35, 00, 3E, 00, 00,
A0, 0D, 06, 04, 35, F4, 05, 70, 02,
A0, 0D, 06, C2, 35, 00, 3E, 00, 03,
A0, 0D, 06, 04, 42, F8, 40, FF, FF,
A0, 0D, 04, 32, 42, F8, 40,
A0, 0D, 04, 46, 42, 68, 40,
A0, 0D, 04, 56, 42, 78, 40,
A0, 0D, 04, 5C, 42, 80, 40,
A0, 0D, 04, CA, 42, 68, 40,
A0, 0D, 06, 06, 16, 0E, 00, 1F, 00,
A0, 0D, 06, 06, 42, 00, 02, F2, F2,
A0, 0D, 06, 32, 4A, 53, 07, 00, 1B,
A0, 0D, 06, 46, 4A, 33, 07, 00, 07,
A0, 0D, 06, 56, 4A, 43, 07, 00, 07,
A0, 0D, 06, 5C, 4A, 11, 07, 01, 07,
A0, 0D, 06, 34, 44, 66, 0A, 00, 00,
A0, 0D, 06, 48, 44, 65, 0A, 00, 00,
A0, 0D, 06, 58, 44, 66, 08, 00, 00,
A0, 0D, 06, 5E, 44, 55, 08, 00, 00,
A0, 0D, 06, CA, 44, 65, 0A, 00, 00,
A0, 0D, 06, 06, 44, 04, 04, C4, 00,
A0, 0D, 06, 34, 2D, DC, 20, 04, 00,
A0, 0D, 06, 48, 2D, 15, 34, 1F, 01,
A0, 0D, 06, 46, 0F, 6C, 01, 04, 00,
A0, 0D, 06, 58, 2D, 0D, 48, 0C, 01,
A0, 0D, 06, 5E, 2D, 0D, 5A, 0C, 01,
A0, 0D, 06, CA, 2D, 15, 34, 1F, 01
}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
NXP_RF_CONF_BLK_2={
20, 02, 19, 03,
A0, 0D, 06, 7A, 16, 8E, 00, 1F, 00,
A0, 0D, 06, 22, 44, 44, 0A, 00, 00,
A0, 0D, 03, 02, 43, A0
}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
NXP_RF_CONF_BLK_3={
20, 02, D6, 01, A0, 34, D2, 23, 04, 18, 07, 00, 00, 20, 60, 01, 10, 20, 60, 01, 1A, 20, A0, 02, 28, 20, A0, 02, 3C, 00, 40, 01, 5C, 00, 40, 01, 93, 00, A0, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 48, 01, 00, 00, 08, 03, 00, 00, 08, 01, 00, 00, C8, 02, 00, 00, C8, 00, 00, 00, 88, 02, 00, 00, 48, 02, 00, 00, B8, 00, 00, 00, 68, 00, 00, 00, 18, 00, 00, 00, 08, 02, 00, 00, 00, 00, 00, 00, 00, 00, 47, 00, 20, 60, 01, 10, 20, 60, 01, 1A, 20, A0, 02, 28, 20, A0, 02, 3C, 00, 40, 01, 5C, 00, 40, 01, 93, 00, A0, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 48, 01, 00, 00, 08, 03, 00, 00, 08, 01, 00, 00, C8, 02, 00, 00, C8, 00, 00, 00, 88, 02, 00, 00, 48, 02, 00, 00, B8, 00, 00, 00, 68, 00, 00, 00, 18, 00, 00, 00, 08, 02, 00, 00, 00, 00
}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
NXP_RF_CONF_BLK_4={
20, 02, 5B, 01, A0, 0B, 57, 11, 11, 90, 78, 0F, 4E, 00, 3D, 95, 00, 00, 3D, 9F, 00, 00, 50, 9F, 00, 00, 59, 9F, 00, 00, 5A, 9F, 00, 00, 64, 9F, 00, 00, 65, 9F, 00, 00, 6E, 9F, 00, 00, 72, 9F, 00, 00, 79, 9F, 00, 00, 7B, 9F, 00, 00, 84, 9F, 00, 00, 86, 9F, 00, 00, 8F, 9F, 00, 00, 91, 9F, 00, 00, 9A, 9F, 00, 00, A1, 9F, 00, 00, A7, 9F, 00, 00, B0, 1F, 00, 00, B9, 1F, 00, 00
}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_5={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_6={
#}
###############################################################################
# Core configuration extensions
# It includes
# Wired mode settings A0ED, A0EE
# Tag Detector A040, A041, A043
# Low Power mode A007
# Clock settings A002, A003
# PbF settings A008
# Clock timeout settings A004
# eSE (SVDD) PWR REQ settings A0F2
# Window size A0D8
# DWP Speed A0D5
# How eSE connected to PN553 A012
# UICC2 bit rate A0D1
# SWP1A interface A0D4
# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
NXP_CORE_CONF_EXTN={
20, 02, 67, 15,
A0, EC, 01, 01,
A0, ED, 01, 00,
A0, 5E, 01, 01,
A0, 12, 01, 02,
A0, 40, 01, 01,
A0, 41, 01, 05,
A0, 43, 01, 04,
A0, 46, 02, BA, 27,
A0, 47, 02, BA, 27,
A0, D8, 01, 02,
A0, DD, 01, 2D,
A0, D1, 01, 02,
A0, D4, 01, 01,
A0, 37, 01, 35,
A0, F2, 01, 01,
A0, 09, 02, E8, 03,
A0, 38, 04, 05, 05, 05, 00,
A0, 3A, 08, C8, 00, C8, 00, C8, 00, C8, 00,
A0, B1, 02, E8, 03,
A0, 9F, 02, 08, 08,
A0, 85, 04, 50, 08, 28, 3C
}
# A0, F2, 01, 01,
# A0, 40, 01, 01,
# A0, 41, 01, 02,
# A0, 43, 01, 04,
# A0, 02, 01, 01,
# A0, 03, 01, 11,
# A0, 07, 01, 03,
# A0, 08, 01, 01
# }
###############################################################################
# Core configuration settings
NXP_CORE_CONF={
20, 02, 2E, 0E,
28, 01, 00,
21, 01, 00,
30, 01, 08,
31, 01, 03,
32, 01, 60,
38, 01, 01,
33, 04, 01, 02, 03, 04,
54, 01, 06,
50, 01, 02,
5B, 01, 00,
80, 01, 01,
81, 01, 01,
82, 01, 0E,
18, 01, 01
}
###############################################################################
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
NXP_RF_CONF_BLK_1={
20, 02, F9, 1D,
A0, 0D, 06, 06, 37, 08, 76, 00, 00,
A0, 0D, 03, 24, 03, 7E,
A0, 0D, 06, 02, 35, 00, 3E, 00, 00,
A0, 0D, 06, 04, 35, F4, 05, 70, 02,
A0, 0D, 06, C2, 35, 00, 3E, 00, 03,
A0, 0D, 06, 04, 42, F8, 40, FF, FF,
A0, 0D, 04, 32, 42, F8, 40,
A0, 0D, 04, 46, 42, 68, 40,
A0, 0D, 04, 56, 42, 78, 40,
A0, 0D, 04, 5C, 42, 80, 40,
A0, 0D, 04, CA, 42, 68, 40,
A0, 0D, 06, 06, 16, 0E, 00, 1F, 00,
A0, 0D, 06, 06, 42, 00, 02, F2, F2,
A0, 0D, 06, 32, 4A, 53, 07, 00, 1B,
A0, 0D, 06, 46, 4A, 33, 07, 00, 07,
A0, 0D, 06, 56, 4A, 43, 07, 00, 07,
A0, 0D, 06, 5C, 4A, 11, 07, 01, 07,
A0, 0D, 06, 34, 44, 66, 0A, 00, 00,
A0, 0D, 06, 48, 44, 65, 0A, 00, 00,
A0, 0D, 06, 58, 44, 66, 08, 00, 00,
A0, 0D, 06, 5E, 44, 55, 08, 00, 00,
A0, 0D, 06, CA, 44, 65, 0A, 00, 00,
A0, 0D, 06, 06, 44, 04, 04, C4, 00,
A0, 0D, 06, 34, 2D, DC, 20, 04, 00,
A0, 0D, 06, 48, 2D, 15, 34, 1F, 01,
A0, 0D, 06, 46, 0F, 6C, 01, 04, 00,
A0, 0D, 06, 58, 2D, 0D, 48, 0C, 01,
A0, 0D, 06, 5E, 2D, 0D, 5A, 0C, 01,
A0, 0D, 06, CA, 2D, 15, 34, 1F, 01
}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
NXP_RF_CONF_BLK_2={
20, 02, 19, 03,
A0, 0D, 06, 7A, 16, 8E, 00, 1F, 00,
A0, 0D, 06, 22, 44, 44, 0A, 00, 00,
A0, 0D, 03, 02, 43, A0
}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
NXP_RF_CONF_BLK_3={
20, 02, D6, 01, A0, 34, D2, 23, 04, 18, 07, 00, 00, 20, 60, 01, 10, 20, 60, 01, 1A, 20, A0, 02, 28, 20, A0, 02, 3C, 00, 40, 01, 5C, 00, 40, 01, 93, 00, A0, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 48, 01, 00, 00, 08, 03, 00, 00, 08, 01, 00, 00, C8, 02, 00, 00, C8, 00, 00, 00, 88, 02, 00, 00, 48, 02, 00, 00, B8, 00, 00, 00, 68, 00, 00, 00, 18, 00, 00, 00, 08, 02, 00, 00, 00, 00, 00, 00, 00, 00, 47, 00, 20, 60, 01, 10, 20, 60, 01, 1A, 20, A0, 02, 28, 20, A0, 02, 3C, 00, 40, 01, 5C, 00, 40, 01, 93, 00, A0, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 08, 02, 00, 00, 48, 01, 00, 00, 08, 03, 00, 00, 08, 01, 00, 00, C8, 02, 00, 00, C8, 00, 00, 00, 88, 02, 00, 00, 48, 02, 00, 00, B8, 00, 00, 00, 68, 00, 00, 00, 18, 00, 00, 00, 08, 02, 00, 00, 00, 00
}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
NXP_RF_CONF_BLK_4={
20, 02, 5B, 01, A0, 0B, 57, 11, 11, 90, 78, 0F, 4E, 00, 3D, 95, 00, 00, 3D, 9F, 00, 00, 50, 9F, 00, 00, 59, 9F, 00, 00, 5A, 9F, 00, 00, 64, 9F, 00, 00, 65, 9F, 00, 00, 6E, 9F, 00, 00, 72, 9F, 00, 00, 79, 9F, 00, 00, 7B, 9F, 00, 00, 84, 9F, 00, 00, 86, 9F, 00, 00, 8F, 9F, 00, 00, 91, 9F, 00, 00, 9A, 9F, 00, 00, A1, 9F, 00, 00, A7, 9F, 00, 00, B0, 1F, 00, 00, B9, 1F, 00, 00
}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_5={
#}
###############################################################################
# NXP RF configuration ALM/PLM settings
# This section needs to be updated with the correct values based on the platform
#NXP_RF_CONF_BLK_6={
#}
###############################################################################
# Core configuration extensions
# It includes
# Wired mode settings A0ED, A0EE
# Tag Detector A040, A041, A043
# Low Power mode A007
# Clock settings A002, A003
# PbF settings A008
# Clock timeout settings A004
# eSE (SVDD) PWR REQ settings A0F2
# Window size A0D8
# DWP Speed A0D5
# How eSE connected to PN553 A012
# UICC2 bit rate A0D1
# SWP1A interface A0D4
# DWP intf behavior config, SVDD Load activated by default if set to 0x31 A037
NXP_CORE_CONF_EXTN={
20, 02, 67, 15,
A0, EC, 01, 01,
A0, ED, 01, 03,
A0, 5E, 01, 01,
A0, 12, 01, 02,
A0, 40, 01, 01,
A0, 41, 01, 05,
A0, 43, 01, 04,
A0, 46, 02, BA, 27,
A0, 47, 02, BA, 27,
A0, D8, 01, 02,
A0, DD, 01, 2D,
A0, D1, 01, 02,
A0, D4, 01, 01,
A0, 37, 01, 35,
A0, F2, 01, 01,
A0, 09, 02, E8, 03,
A0, 38, 04, 05, 05, 05, 00,
A0, 3A, 08, C8, 00, C8, 00, C8, 00, C8, 00,
A0, B1, 02, E8, 03,
A0, 9F, 02, 08, 08,
A0, 85, 04, 50, 08, 28, 3C
}
# A0, F2, 01, 01,
# A0, 40, 01, 01,
# A0, 41, 01, 02,
# A0, 43, 01, 04,
# A0, 02, 01, 01,
# A0, 03, 01, 11,
# A0, 07, 01, 03,
# A0, 08, 01, 01
# }
###############################################################################
# Core configuration settings
NXP_CORE_CONF={
20, 02, 2E, 0E,
28, 01, 00,
21, 01, 00,
30, 01, 08,
31, 01, 03,
32, 01, 60,
38, 01, 01,
33, 04, 01, 02, 03, 04,
54, 01, 06,
50, 01, 02,
5B, 01, 00,
80, 01, 01,
81, 01, 01,
82, 01, 0E,
18, 01, 01
}